the a3425lk dual hall-effect switch is an extremely temperature-stable and stress-resistant sensor especially suited for use in digital-encoder systems in the harsh environments of automotive or industrial applications over extended temperature ranges to +150 c. superior high-temperature performance is made possible through dynamic offset cancellation, which reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. this device also eliminates the major manufacturing hurdles encountered in fine-pitch direction-detection applications, namely maintaining accurate mechanical location between the two active hall elements. here, the two hall elements are photolithographically aligned to better than 1 m, as contrasted with 100 m or worse me- chanical location tolerance when manufactured discretely. the a3425lk is an ultra-sensitive device optimized for use with high- density ring magnets. the device includes on a single silicon chip a voltage regulator, two independent chopper-stabilized hall-voltage generators , two small- signal amplifiers, two schmitt triggers, and two short-circuit protected open-collector outputs to sink up to 30 ma each. an on-board regulator permits operation with supply voltages of 3.3 to 26.5 volts. with suitable output pull ups, it can be used directly with bipolar or mos logic circuits. the a3425lk dual hall-effect switch is supplied in a 4-pin plastic sip for operation over a temperature range of -40 c to +150 c. a similar device, with on-chip logic processing specifically for direction detection applications, in a 5-pin sip, is the a3422lka. features two matched hall switches on a single substrate 1 mm sensor-to-sensor spacing superior temperature stability resistant to physical stress output short-circuit protection operation from unregulated supply reverse battery protection solid-state reliability integrated esd protection on outputs and supply data sheet 27651.20 preliminary information (subject to change without notice) june 28, 2002 pinning is shown viewed from branded side. dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 3425 absolute maximum ratings at t a = +25 c supply voltage, v cc ........................ 26.5 v reverse battery voltage, v rcc .......... -18 v zener current, i z ............................ 100 ma magnetic flux density, b ........... unlimited output off voltage, v out .................... v cc output current, i out ........................ 30 ma reverse output current, i out ........ -50 ma package power dissipation, p d . see graph junction temperature, t j ............... +170 c operating temperature range, t a , ............................ -40 c to +150 c storage temperature range, t s .............................. -65 c to +170 c always order by complete part number, e.g., a3425lk . dwg. ph-017 1 supply v cc 4 ground 3 2 x output 2 output 1 x
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 2 functional block diagram copyright ? 2002 allegro microsystems, inc. output 1 <1 ? x dynamic offset cancellation reg. to all subcircuits supply control current limit sample & hold low-pass filter dwg. fh-020-7 ground output 2 <1 ? x dynamic offset cancellation control current limit sample & hold low-pass filter 1 2 3 4 e1 e2 75 100 125 150 175 1.0 0.2 0 allowable package power dissipation in watts ambient temperature in c 0.8 0.6 0.4 50 dwg. gh-001-1 25 0 free air, r = 177 c/w ja -25
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch www.allegromicro.com 3 electrical characteristics over operating temperature range, each switch tested separately (unless otherwise specified). limits characteristic symbol test conditions min. typ. max. units supply voltage range v cc operating, t j < 170 c 1 3.3 C 26.5 v output leakage current i off v out = 18 v, b < b rp C <1.0 10 a output saturation voltage v out(sat) i out = 20 ma, b > b op C 225 400 mv output current limit i om b > b op 30 C 55 ma chopping frequency f c C 340 C khz output rise time t r r l = 820 ? , c l = 10 pf C 110 C ns output fall time t f r l = 820 ? , c l = 10 pf C 55 C ns total supply current i cc both outputs off, v cc 26.5 v C 3.8 6.0 ma both outputs on, v cc 26.5 v C 7.5 10 ma reverse battery current i cc v rcc = -18 v C 2.0 15 ma zener voltage v z + v d i cc = 15 ma, t a = 25 c 283337 v zener impedance z z + z d i cc = 15 ma, t a = 25 c C 50 100 ? notes:1. supply voltage is limited by allowable package power dissipation as a function of ambient temperature. 2. b op = operate point (output turns on); b rp = release point (output turns off). 3. typical data is at t a = +25 c and v cc = 12 v and is for design information only. magnetic characteristics over operating supply voltage and temperature ranges, each switch tested separately (unless otherwise specified). limits characteristic symbol test conditions min. typ. max. units operate point b op1 C 8.0 24 g b op2 C1124g release point b rp1 -24 -11 C g b rp2 -24 -8.0 C g hysteresis b hys b op C b rp 5.0 19 35 g operate differential b op(dif) b op1 C b op2 C -2.0 30 g release differential b rp(dif) b rp1 C b rp2 C -3.3 30 g symmetry b sym b op + b rp CC 30 g notes:1. as used here, negative flux densities are defined as less than zero (algebraic convention) and -50 g is less than +10 g. 2. typical data is at t a = +25 c and v cc = 12 v and is for design information only.
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 4 typical operating characteristics as a function of temperature total supply current output saturation voltage channel 2 switch points 0 50 100 ambient temperature in c -50 dwg. gh-026-7 switch point in gauss 0 5 150 -25 25 75 125 10 15 20 25 -25 -20 -15 -10 -5 release point v cc = 18-26.5 v v cc = 3.3-5 v v cc = 5 v v cc = 3.3 v v cc = 18 v v cc = 26.5 v operate point 0 50 100 ambient temperature in c -50 dwg. gh-026-8 switch point in gauss 0 5 operate point 150 -25 25 75 125 10 15 20 25 -25 -20 -15 -10 -5 release point v cc = 26.5 v v cc = 18 v v cc = 3.3-5 v v cc = 26.5 v v cc = 5 v v cc = 18 v v cc = 3.3 v channel 1 switch points 0 25 50 75 100 300 0 ambient temperature in c 200 100 -50 dwg. gh-029-5 saturation voltage in mv 150 -25 125 i out = 20 ma v cc = 26.5 v v cc = 3.3 v 0 supply current in ma 8 6 4 2 0 255075100 ambient temperature in c -50 dwg. gh-028-8 125 -25 150 b b op v cc = 18 v v cc = 18 v v cc = 3.3 v v cc = 3.3 v b b rp
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch www.allegromicro.com 5 sensor locations ( 0.005" [0.13 mm] die placement) although sensor location is accurate to three sigma for a particular design, product improvements may result in small changes to sensor location. a 1 4 3 2 dwg. mh-001-4a 0.0165" 0.42 mm nom 0.053" 1.34 mm branded surface active area depth 0.083" 2.11 mm 0.039" 1.00 mm e1 e2 allegro typical operating characteristics (cont'd) as a function of supply voltage operate and release differentials 0 50 100 ambient temperature in c -50 dwg. gh-026-9 b op /b rp differential in gauss 0 5 150 -25 25 75 125 10 15 20 25 -25 -20 -15 -10 -5 b op v cc = 3.3 v v cc = 5-18 v b rp v cc = 3.3 v v cc = 5 v v cc = 18 v
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 6 criteria for device qualification qualification test test method and test conditions test length samples comments biased humidity (hast) jesd22-a101, 1000 hrs 77 v cc = v out = 3.3 v t a = 85 c, rh = 85% high-temperature jesd22-a108, 1000 hrs 77 operating life (htol) t a = 150 c, t j = 165 c accelerated htol t a = 170 c, t j = 180 c 168 hrs 77 autoclave, unbiased jesd22-a102, condition c, 96 hrs 77 high-temperature mil-std-883, method 1008, 1000 hrs 77 (bake) storage life t a = 170 c temperature cycle mil-std-883, method 1010, 1000 cycles 77 -55 c to +150 c esd, cdf-aec-q100-002 pre/post x per test to failure, human body model reading test all leads > tbd all allegro sensors are subjected to stringent qualification requirements prior to being released to production. to become qualified, except for the destructive esd tests, no failures are permitted. the products described herein are manufactured under one or more of the following u.s. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro products are not authorized for use as critical components in life-support appliances, devices, or systems without express written approval. the information included herein is believed to be accurate and reliable. however, allegro microsystems, inc. assumes no responsi- bility for its use; nor for any infringements of patents or other rights of third parties that may result from its use.
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch www.allegromicro.com 7 functional description chopper-stabilized technique. these devices use a proprietary dynamic offset cancellation technique, with an internal high-frequency clock to reduce the residual offset voltage of the hall element that is normally caused by device overmolding, temperature dependencies, and thermal stress. this technique produces devices that have an extremely stable quiescent hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. this technique will also slightly degrade the device output repeatability. the hall element can be considered as a resistor array similar to a wheatstone bridge. a large portion of the offset is a result of the mismatching of these resistors. the chopper-stabilizing technique cancels the mismatch- ing of the resistors by changing the direction of the current flowing through the hall plate and hall voltage measure- ment taps, while maintaining the hall-voltage signal that is induced by the external magnetic flux. the signal is, then, captured by a sample-and-hold circuit. more detailed descriptions of the circuit operation can be found in: technical paper stp 97-10, monolithic magnetic hall sensor using dynamic quadrature offset cancellation and technical paper stp 99-1, chopper- stabilized amplifiers with a track-and-hold signal demodulator . operation. the output of these devices switches low (turns on) when a magnetic field perpendicular to the hall sensor exceeds the operate point threshold (b op ). after turn-on, the output is capable of sinking 30 ma and the output voltage is v out(sat) . when the magnetic field is reduced below the release point (b rp ), the device output switches high (turns off). note especially that release can occur when the magnetic field is removed but to ensure release, a field reversal is required. the difference in the magnetic operate and release points is the hysteresis (b hys ) of the device. this built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. dwg. eh-012 reg sample & hold x +v hall voltage b + dwg. ah-011-2 0 +b 0 output voltage flux density dwg. gh-034-5 -b rp b v out(sat) cc v op b +v
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 8 quadrature/direction detection. external logic circuitry can be used to determine the direction of move- ment of the magnetic field across the face of the package. for the direction signal to be appropriately updated, a quadrature relationship must be maintained between the ring magnet pole width*, the sensor-to-sensor spacing, and, to a lesser extent, the magnetic switch points. for optimal design, the sensor should be actuated with a ring magnet pole width two times the sensor-to-sensor spacing. this will produce a sinusoidal magnetic field whose period (denoted as ) is then four times the sensor-to- sensor spacing. a quadrature relationship can also be maintained for a ring magnet that has a period that satis- fies the relationship n /4 = 1.0 mm, where n is any odd integer. therefore, ring magnets with pole-pair spacings equal to 4 mm (n = 1), 1.3 mm (n = 3), etc. are permitted. the response of the device to the magnetic field produced by a rotating ring magnet is shown above. note the desired phase shift between the two integrated sensors. * pole refers to a single pole (north or south) unless stated as pole pair (north and south). b op1 b rp1 dwg. wh-012-1 +b -b +b -b b rp2 out e1 out e2 b op2 applications information over-current protection. current through each output transistor is sensed with a low-value (<1 ? ) on-chip aluminum resistor. the voltage drop across this resistor is fed back to control the base drive of that output. this feedback prevents the output transistor from exceeding its maximum current-density rating by limiting the output current to between 30 ma and 55 ma. in this mode, the device will come out of saturation and dissipate an in- creased amount of power p d = v out x i om where v out = v cc - (i om x r l ) and the output transistor will be thermally stressed. this stress, unless protected against, will cause the device junction temperature to rise until it fails catastrophically. over-current limiting is intended to protect the device from transient overloads and should not imply that output short circuits are permitted.
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch www.allegromicro.com 9 rotated sensor for fine-pitch ring magnets a 12 4 3 dwg. mh-024-1 target face width, f >1.00 sin (mm) >0.039 sin (inch) 1.00 cos (mm) 0.039 cos (inch) 0.039" 1.00 mm a 1 2 4 3 applications information (cont'd) power dissipation and junction temperature. operating characteristics are limited by allowable package power dissipation (p d ) as a function of ambient tempera- ture (t a ), which is defined by the maximum internal junction temperature (t j = 170 c) and the package thermal resistance (r ja = 177 c/w). p d = (t j ?t a )/r ja = (170 ?t a )/177 this is shown in the graph on page 2. actual or required package power dissipation is the sum of the two output powers (d.c. x i out1 x v out(sat)1 ) + (d.c. x i out2 x v out(sat)2 ) and the sensor power (i cc x v cc ). at high ambient operating temperatures (above about 120 c), it is easy to exceed the allowable package power dissipation. in this case, the output currents or the supply voltage must be reduced. operation with fine-pitch ring magnets. for targets with a circular pitch of less than 4mm, a perfor- mance improvement can be observed by rotating the front face of the sensor subassembly (see below). this sensor rotation decreases the effective sensor-to-sensor spacing, provided that the hall elements are not rotated beyond the width of the target. applications. it is strongly recommended that an external 0.01 f bypass capacitor be connected (in close proximity to the hall sensor) between the supply and ground of the device to reduce both external noise and noise generated by the internal logic. the simplest form of magnet that will operate these devices is a ring magnet. other methods of operation, such as linear magnets, are possible. extensive applica- tions information on magnets and hall-effect sensors is also available in the ?all-effect ic applications guide which can be found in the latest issue of the allegro microsystems electronic data book, ams-702 or appli- cation note 27701, or at www.allegromicro.com
3425 dual, chopper-stabilized, ultra-sensitive, bipolar hall-effect switch 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 10 dimensions in inches (controlling dimensions) dimensions in millimeters (for reference only) notes: 1. tolerances on package height and width represent allowable mold offsets. dimensions given are measured at the widest po int (parting line). 2. exact body and lead configuration at vendors option within limits shown. 3. height does not include mold gate flash. 4. recommended minimum pwb hole diameter to clear transition area is 0.035" (0.89 mm). 5. where no tolerance is specified, dimension is nominal. surface-mount lead form (order a3425lk-tl) 2.41 0.13 0.51 min flat dwg. mh-015 mm 0.10 max 0.051 max 0 8 0.095 0.005 0.020 min flat dwg. mh-015 in 0.004 max 0.002 max 0 8 45 dwg. mh-009d in 0.063 0.059 0.033 0.0173 0.0138 0.0189 0.0142 0.050 bsc 1234 45 see note 0.208 0.203 0.138 0.133 0.600 0.560 0.085 max 45 dwg. mh-009d mm 1.60 1.50 0.84 0.44 0.35 0.48 0.36 1.27 bsc 1234 45 see note 5.28 5.16 3.51 3.38 15.24 14.23 2.16 max
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